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MIPS R2000
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processor
The R2000 design came, in about 1987, from the
Stanford
MIPS project
, which stood for Microprocessor
without Interlocked Pipeline Stages.
Like the
AMD 29000
, the R2000 has no
condition coderegister
considering it a potential
bottleneck
. The
program counter
can be read like other registers.
The CPU includes an
MMU
that can also control a
cache
, and
the CPU can operate as
big-endian
or
little-endian
. There
is a
FPU
, the R2010.
Versions include the
MIPS R3000
and
MIPS R4000
.
(1995-02-09)
Related search result for
"MIPS R2000"
Words pronounced/spelled similarly to
"MIPS R2000"
:
MIPS R4000
MIPS R3000
MIPS R2010
MIPS R2000
Words contain
"MIPS R2000"
in its definition in
Computing (FOLDOC) dictionary:
MIPS R2000
R2000
MIPS R3000
MIPS R2010
Microprocessor without Interlocked Pipeline Stages
MIPS Technologies, Inc.
MIPS
MIPS R4000
water MIPS
m2
more...
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"MIPS R2000"